Our Expertise

 

Circuit Design

Experience in standard IC design methodology with functional simulation and analysis, PPA analysis including design for reliability.

Design Verification

Expert in SystemVerilog and Specman E test-bench language and UVM. Develops scalable and portable test benches.

STD Cell Layout

Experienced in developing high quality STD cell layout for high-speed, high-density, high-voltage and low power libraries.

Analog Mixed Signal Layout

Implementation of analog blocks, resistors, capacitors, pads IOs, ESD structures, etc.

Place and Route

Driven block/chip physical implementation through synthesis, formal verification, floor planning, pin planning, IR drop analysis, sign-off, etc.

Our Track Record

 

200

& growing – team of experts

80+

years of combined engineering experience

600+

project releases

8

foundries – exposure

latest

process node handled

20+

top global
end-customers

Global Engagements

We have established solid client relationships with major companies in North America, Europe and Asia.

 

Our new-generation workforce 

is a growing collective of industry pioneers and fresh minds that altogether raises the strength of our engineering services.